Our view on RS08
I just read Jack's editorial on Embedded.com on the RS08 processor. This is a fun little processor.
We did some work on the instruction set design on this processor, and wrote a C compiler for the RS08. This is a remarkable little processor that, in the end, outperformed many people's expectations (including mine). The processor has family ties to the very old 6804, 6805 families and the various 6808 families, with a dose of RISC in the way its call return is handled.
A lot of tradeoffs were made in the instruction set. The processor mapped the index register and index indirect into in-memory space, releasing all of the index-specific instruction space to support a new "tiny" 16-byte address space.
Direct data access is limited to 8 bits address space, very similar to the 6808 DIR space. A flexible paging system gives access to the full 14-bit linear address space (including ROM constants) and eliminates the need for EXT access found on the 6808. The RS08 does not have a data or subroutine return stack; this further reduces the opcode space from the 6808.
The RS08 has functionality not found in the 6808. Bit manipulation and bit branch instructions on the RS08 can access the full memory space, where the 6808 can only do this on the first 256 bytes of address space. The memory-to-memory moves and constant-to-memory instructions can reference the full processor address space, unlike the 256 address limit on the 6808. Both of these reduce data flow pressure on the single accumulator.
How well does it work? It works very well. Compiler technology is now very good at managing a compile-time stack in global RAM space. Whole application optimizing compilers decide "Tiny" address space usage and nested subroutine support. Aggressive tail-end recursion optimization further reduces RAM needs and accesses. Benchmarks run on the RS08 against the 6808 shows that over all it requires a few percent (6-8%) more code and execution cycles than the 6808. The die complexity is greatly reduced.
Byte Craft created syntax to support event-driven processing to compensate for the lack of interrupts and RTOS real time support. Events are logical conditions (interrupt-like flags and logical expressions on global data) that start the execution of a code block, similar to interrupt support. Event bodies run to completion without interruption. This flat execution structure reduces the needed RAM to ROM ratio for applications running on the RS08 to about 30 to 1, instead of the more usual 20:1 for compiled code and 16:1 for the average hand-coded assembler.
The background mode debugging facility has a second use suitable for many applications. The port may be used for inter-processor communications in a multiprocessor environment, where the RS08 implements a single function within the larger application. The BDM port allows asynchronous access to internal data buffers.
Here are some links that give more information about our support for RS08.
The RS08 was the first processor that we implemented ISO 18037 on so that the whole instruction set can be encoded in C. This paper shows how we proved that anything that can be written in asm can be written in C with the same or less code space.