Many applications require a small amount of RAM and a much larger amount of ROM space. Harvard architecture processors achieve some of their code efficiency by reducing the amount of RAM address space in the processor. There comes a time when the amount of RAM address space in the processor is not sufficient to meet application requirements.

The National Semiconductor COP8™ instruction set has 8 bits of RAM address space to cover both peripheral and application RAM requirements. The COP8™ family accesses extended RAM space by using register as a base address pointer. This register location, named SREG, acts as an 8 bit extension to the RAM address. The address extension is effective only when the lower nibble has a value between 0 and $7F.

The following declaration is for the COP888 device:

 #pragma has 888;
#pragma has SREG;
#pragma memory ROM[4096] @ 0;
#pragma memory RAM[12] @ 0xF0;
#pragma memory RAM[48] @ 0;
#pragma memory RAM[80] @ 0x100;